Analysis of voltage ripple using power factor corrector to achieve fast response

Abstract

The design of an active Power Factor Corrector (PFC) leads to slow transient response in this type of converter. The reason for this is due to compensator placed in the output- voltage feedback loop is frequently designed to have narrow bandwidth to filter the voltage ripple of twice the line frequency obtaining from the PFC output voltage. This feedback loop is designed with this filtering effect because a relatively high ripple would cause considerable distortion in the reference line current feedback loop and line current. However, if the bandwidth of the compensator in the voltage loop is relatively wide, the transient response of the PFC range is improved. As a significance of the voltage ripple at the output of the compensator, both the static and the dynamic behaviors of the PFC change in comparison with no voltage ripple on the control signal. This paper presented, the static behavior of a PFC with appreciable voltage ripple in the output-voltage feedback loop using two parameters: the amplitude of the relative voltage ripple (k) on the control signal and its phase lag angle. The total power processed by the PFC depends on these parameters, which do not vary with the load and which determine the Total Harmonic Distortion (THD) and the Power Factor (PF) at the input of the power factor correction converter. Finally, the results are verified by MATLAB/ Simulink simulation.