Analysis of Threshold Voltage Shift in AlGaN/GaN Heterostructure Field-Effect Transistors with Different Buffer Layers

Abstract

This study applied a methodology for defining the threshold voltage shift (ΔVTH) transient of AlGaN/GaN heterostructure field-effect transistors (HFETs) to observe the influence of traps in AlGaN/GaN HFETs with different buffer layers: a carbon-doped (C-doped) buffer and an Al0.05Ga0.95N back barrier layer. This methodology involves synchronous switching of gate-to-source voltage (VGS) and drain-to-source voltage (VDS). Two HFETs demonstrated similar transient behaviors but different trends by enduring various VDS stress level. For devices with a C-doped buffer layer, the amount of threshold voltage shift becomes saturated with increasing VDS stress; however, a device with an Al0.05Ga0.95N back barrier layer does not. A simulation tool was used to analyze the trap behaviors and close agreement was seen between measured and simulated.