Abstract
With two-dimensional device simulation software, the influence of the deep depletion (DD) of the silicon-on-insulator (SOI) lateral double-diffused metal-oxide-semiconductor (LDMOS) device substrate on the transient breakdown voltage (TrBV) was analyzed. Based on the changes in the characteristics of the charge distribution and the depletion layer in the device substrate with time and the related parameters in the off state, the mechanism of their action on the transverse and vertical breakdown voltages (BVs) was studied. TrBV demonstrates completely different characteristics from the static breakdown voltage (StBV) due to the DD effect of SOI LDMOSs. Low drift region concentration (N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</sub> ) and substrate doping concentration (P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sub</sub> ) are conducive to obtaining a high maximum TrBV. With increasing drain voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</sub> ), the turn-off nonbreakdown time (T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nonbv</sub> ) of the device with higher P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sub</sub> decreases faster. However, the T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nonbv</sub> with higher P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sub</sub> is higher at low V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</sub> . Therefore, the maximum T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nonbv</sub> can be obtained by optimizing N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</sub> and P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sub</sub> under a given V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</sub> . In addition, T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nonbv</sub> is greatly reduced with increasing temperature.
Highlights
Regarding the static breakdown voltage (StBV) of silicon-oninsulator (SOI) lateral double-diffused metal-oxidesemiconductor (LDMOS), when the device is in the off state, there is an inversion layer under the buried oxide (BOX), and the blocking voltage can only be sustained by the drift region and the BOX [1]- [2]
This study provides the results of the maximum transient breakdown voltage (TrBV) and turn-off nonbreakdown time by optimizing the doping concentration in the drift region and the doping concentration in the substrate, which provides a basis for the BV design of fast switching SOI LDMOS power devices
The TrBVmax value can be obtained by optimizing Nd and Psub
Summary
Regarding the static breakdown voltage (StBV) of silicon-oninsulator (SOI) lateral double-diffused metal-oxidesemiconductor (LDMOS), when the device is in the off state, there is an inversion layer under the buried oxide (BOX), and the blocking voltage can only be sustained by the drift region and the BOX [1]- [2].
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