Abstract

The use of planar transformers has increased in the last few years due to their efficiency in high frequency switching-mode power supplies (SMPS). Like all other devices constructed in planar technology, they have a lot of advantages like repeatability of elements, decreased dimensions and weight and high switching frequency, but there are some disadvantages too. In order to improve them one must know that the parasitic elements which must be suppressed are the parasitic capacitances between the windings, the leakage inductance and the losses. This paper analyzes the parasitic parameters of planar transformers, aiming to optimize them by the minimization of the losses and parasitic capacitances.

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