Analysis of the execution of a next generation application on superscalar and grid processors

Abstract

The astonishing advances in processing speeds and the phenomenal increase in chip densities have enabled the creation of very powerful microprocessors and computer systems. Future high end computing systems are expected to have teraflops of computing capability and massive amounts of storage. Such computers are expected to be important for discovery in the fundamental sciences, pharmaceuticals, and several other causes for the improvement of mankind. In this paper, we analyze a workload that is expected to be instrumental in designing and architecting future computing systems. The workload is a ground motion tracker indication (GMTI) application created by the scientists at the MIT Lincoln Laboratory. The application is being used to drive the design of several advanced future computer systems; hence it is important to understand the computational, memory access and parallelism features of this application. In this paper, we first describe the various components/stages of this application. Then, we perform detailed analysis of the execution of this application. On the basis of profiling the execution of the application, both on actual platforms and with simulations, we show that the parallelism in the several stages of the application is different. The application is seen to contain a large amount of parallelism that can be exploited by spatially or temporally parallel computer architectures. However, the nonuniformities in computing requirements as well as memory access patterns of the different stages are important considerations in the design of spatially/temporally parallel architectures to handle these applications. The execution of the application on a superscalar processor and a grid processor are analyzed.