Abstract

Electrostatic discharge (ESD) is a major threat to the reliability of integrated circuits, where approximately 20% of total integrated circuit (IC) failures are due to ESD. Discharge of charged objects or human discharge into IC chip pins with very high currents (up to 10 A) in a short time period (1 ns to 200 ns) causes serious damage to the very sensitive devices of the circuitry. This may happened during manufacturing, assembly, shipment, and in the field. Since the phenomenon is unavoidable, there is a strong need of developing proper strategies to protect the functional devices, circuits and systems. In this paper we present the analysis of the ESD protection structure supported by the advanced 2-D mixed mode electro-thermal device and circuit simulation.

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