Abstract
One of the traditional issues in space missions is the reliability of the electronic components on board spacecraft. There are numerous techniques to deal with this, from shielding and rad-hard fabrication to ad-hoc fault-tolerant designs. Although many of these solutions have been extensively studied, the recent utilization of FPGAs as the target architecture for many electronic components has opened new possibilities, partly due to the distinct nature of these devices. In this study, we performed fault injection experiments to determine if a RISC-V soft processor implemented in an FPGA could be used as an onboard computer for space applications, and how the specific nature of FPGAs needs to be tackled differently from how ASICs have been traditionally handled. In particular, in this paper, the classic definition of the cross-section is revisited, putting into perspective the importance of the so-called “critical bits” in an FPGA design.
Highlights
Reliability has always been a concern for space missions, especially for on-board electronics.Since the beginning of the space exploration era, different phenomena affecting the behavior of the electronic components have been reported
We implemented the RISC-V versions on the field-programmable gate array (FPGA) board used in the experiments (Xilinx UltraScale), and we considered that the system is going to operate in LEO orbit, in the proximity of the South Atlantic Anomaly
Where Φ is the flux that the system is receiving, σ is the physical cross-section of the FPGA, N is the number of critical bits, and P is the normalized probability that an induced bit flip will produce an error at the output
Summary
Reliability has always been a concern for space missions, especially for on-board electronics. In these FPGAs, the user logic is still vulnerable to radiation, the configuration memory is vulnerable, and may sometimes be the predominant source of errors, mainly due to its size [6] If this happens, the effects usually translate into an actual modification of the circuit structure (e.g., a change on the routing or the logic function). This greatly differs from the ASIC case since in FPGAs the error situations are more a structural modification (that requires reconfiguration to be solved), and not a pure error propagation issue This difference in the error model is the reason there is an increasing trend to study the reliability issues of utilizing an FPGA to host payload and instrument-related electronics, and mission-critical systems such as the onboard computer of the satellite.
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