Analysis of temperature and wave function penetration effects in nanoscale double-gate MOSFETs

Abstract

Wave function penetration has significant impact on nanoscale devices having ultrathin gate oxide. Although wave function penetration effects on ballistic drain current and capacitance-voltage characteristics in nanoscale devices have been reported in literature, to the best of the authors’ knowledge, effects of temperature on drain current incorporating with and without wave function penetration are yet to be studied. In this work, the impacts of temperature, gate dielectric and film thickness in wave function penetration on ballistic drain current of nanoscale double-gate (DG) MOSFETs are presented. The effects are observed using two-dimensional self-consistent solution of Schrödinger and Poisson equations. It has been obtained that temperature effect on drain current is greatly dependent on silicon surface orientation. Drain current of DG MOSFETs fabricated on $$\langle110\rangle$$ surface is more sensitive to temperature compared to $$\langle001\rangle$$ surface. This has been obtained for both the cases with and without incorporating wave function penetration in silicon–gate oxide interface. Electrostatics behind this phenomenon has been explained from the transmission probability of electrons from source to drain which is largely influenced by temperature on $$\langle110\rangle$$ surface compared to $$\langle001\rangle.$$ Moreover, the transmission coefficient is significantly affected by wave function penetration in $$\langle110\rangle \hbox{ than }\langle001\rangle$$ surface. Both these demonstrate greater sensitivity of temperature and wave function penetration in $$\langle110\rangle$$ silicon surface orientation compared to $$\langle001\rangle.$$ Furthermore, gate dielectric with lower conduction band offset and device scaling with thin channel thickness tend to exhibit greater impact of wave function penetration.