Analysis of surface states and series resistance in Au/n-Si Schottky diodes with insulator layer using current–voltage and admittance–voltage characteristics

Abstract

In order to good interpret the experimentally observed Au/n-Si (metal–semiconductor) Schottky diodes with thin insulator layer (18 Å) parameters such as the zero-bias barrier height ( Φ bo), ideality factor ( n), series resistance ( R s) and surface states have been investigated using current–voltage ( I– V), capacitance–frequency ( C– f) and conductance–frequency ( G– f) techniques. The forward and reverse bias I– V characteristics of Au/n-Si (MS) Schottky diode were measured at room temperature. In addition, C– f and G– f characteristics were measured in the frequency range of 1 kHz–1 MHz. The higher values of C and G at low frequencies were attributed to the insulator layer and surface states. Under intermediate forward bias, the semi-logarithmic Ln ( I)– V plot shows a good linear region. From this region, the slope and the intercept of this plot on the current axis allow to determine the ideality factor ( n), the zero-barrier height ( Φ bo) and the saturation current ( I S) evaluated to 2.878, 0.652 and 3.61 × 10 −7 A, respectively. The diode shows non-ideal I– V behavior with ideality factor greater than unity. This behavior can be attributed to the interfacial insulator layer, the surface states, series resistance and the formation barrier inhomogeneity at metal–semiconductor interface. From the C– f and G– f characteristics, the energy distribution of surface states ( N ss) and their relaxation time ( τ) have been determined in the energy range of ( E c − 0.493 E v)–( E c − 0.610) eV taking into account the forward bias I– V data. The values of N ss and τ change from 9.35 × 10 13 eV −1 cm −2 to 2.73 × 10 13 eV −1 cm −2 and 1.75 × 10 −5 s to 4.50 × 10 −4 s, respectively.