Analysis of single event transient pulse-width in 65 nm commercial radiation-hardened logic cell

Abstract

With the critical charge reduced to generate a single event effect (SEE) and high working frequency for a nanometer integrated circuit, the single event effect (SET) becomes increasingly serious for high performance SOC and DSP chips. To analyze the radiation-hardened method of SET for the nanometer integrated circuit, the n+ guard ring and p+ guard ring have been adopted in the layout for a 65 nm commercial radiation-hardened standard cell library. The weakest driving capacity inverter cell was used to evaluate the single event transient (SET) pulse-width distribution. We employed a dual-lane measurement circuit to get more accurate SET’s pulse-width. Six kinds of ions, which provide LETs of 12.5, 22.5, 32.5, 42, 63, and , respectively, have been utilized to irradiate the SET test circuit in the Beijing Tandem Accelerator Nuclear Physics National Laboratory. The testing results reveal that the pulse-width of most SETs is shorter than 400 ps in the range of LETeff from to and the pulse-width presents saturation tendency when the effective linear energy transfer (LETeff) value is larger than . The test results also show that the hardened commercial standard cell’s pulse-width concentrates on 33 to 264 ps, which decreases by 40% compared to the pulse-width of the 65 nm commercial unhardened standard cell.