Abstract
Random Telegraph Noise (RTN) and low frequency noise (LFN) properties were investigated for the first time in sub-100 nm 3-D stacked NAND flash memory with tube-type poly-Si channel structure. The 3-D stacked NAND flash memory showed higher noise power density of bit-line (BL) current (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BL</sub> ) by ~10 times than 32 nm planar NAND flash memory. The behavior of ΔI <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BL</sub> was investigated with control-gate bias (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CG</sub> ), BL bias (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BL</sub> ) and pass bias (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">pass</sub> ). As temperature (T) increases, capture and emission times becomes short. To understand poly-Si channel, planar poly-Si thin film transistors (TFT) with different grain size were prepared and analyzed in terms of noise, subthreshold swing (SS), and T.
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