Analysis of Power Consumption in Future High-Capacity Network Nodes

Abstract

Power consumption and the footprint of future network elements are expected to become the main limiting factors for scaling the current architectures and approaches to capacities of hundreds of terabits or even petabits per second. Since the underlying demand for network capacity can be satisfied only by contemporaneously increasing transmission bit rate, processing speed, and switching capacity, it unavoidably will lead to increased power consumption of network nodes. On the one hand, using optical switching fabrics could relax the limitations to some extent, but large optical buffers occupy larger areas and dissipate more power than electronic ones. On the other hand, electronic technology has made fast progress during the past decade regarding reduced feature size and decreased power consumption. It is expected that this trend will continue in the future. This paper addresses power consumption issues in future high-capacity switching and routing elements and examines different architectures based on both pure packet-switched and pure circuit-switched designs by assuming either all-electronic or all-optical implementation, which can be seen as upper and lower bounds regarding power consumption. The total power consumption of a realistic and appropriate technology for future high-performance core network nodes would probably lie somewhere between those two extreme cases. Our results show that implementation in optics is generally more power efficient; especially circuit-switched architectures have a low power consumption. When taking into account possible future developments of Si CMOS technology, even very large electronic packet routers having capacities of more than hundreds of terabits per second seem to be feasible. Because circuit switching is more power efficient and easier to implement in optics than pure packet switching, the scalability limitation due to increased power consumption could be considerably relaxed when a kind of dynamic optical circuit switching is used within the core network together with an efficient flow aggregation at edge nodes.