Abstract
A novel Helmholtz coil inductively coupled plasma (H-ICP) etcher is proposed and characterized for deep nanoscale CMOS technology. Various hardware tests are performed while varying key parameters such as distance between the top and bottom coils, the distance between the chamber ceiling and the wafer, and the chamber height in order to determine the optimal design of the chamber and optimal process conditions. The uniformity was significantly improved by applying the optimum conditions. The plasma density obtained with the H-ICP source was about 5×10/cm, and the electron temperature was about 2–3 eV. The etching selectivity for the poly-silicon gate versus the ultra-thin gate oxide was 482:1 at 10 sccm of HeO2. The proposed H-ICP was successfully applied to form multiple 60-nm poly-silicon gate layers.
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More From: Transactions on Electrical and Electronic Materials
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