Abstract
In highly integrated automated test equipment (ATE) systems, precision measurement units are used to generate analog signals with DACs. To ensure high linearity and measurement accuracy, DACs are designed with excellent static performance. Based on theoretical analysis, modeling analysis, and simulation, this paper proposes a method for designing an interpolated resistance string DAC with buffers. Based on a 0.18−μm process, a 16-bit 500 kHz resistance string DAC occupies a die area of 1μm2 The post-simulation shows that DNL and INL are less than ＋0.77/−0.83 LSB and ＋3.66/−3.08 LSB. Operating at 500 KS/s, the DAC provides an ENOB of 14.2 for signal @248.54 KHz and consumes 14mw from a 5 V power supply. The introduced DAC is suitable for low-speed and high-precision application scenarios in ATE equipment.
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