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Abstract
Understanding the origin and mechanism of leakage currents in CMOS/SOS transistors constitutes an important step towards the advancement of SOS technology for VLSI applications. In this letter, the bias and geometrical dependence of both n- and p-channel transistors has been analysed in detail. These variations have been correlated with independent lifetime measurements, which indicate that both bulk generation and back surface inversion play important roles in controlling leakage in SOS devices.
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