Abstract
The retention characteristic of memory devices is an important issue as the size of the chip is scaled down continuously. However, it is hard to retain the reliable retention characteristic at smaller size of chip since the interference and leakage problems are induced by scaling down the chip. This paper suggests the main leakage mechanisms of 2x-nm flash memory at the pre-cycling situation by comparing the measurement Vth data with TCAD simulation to analyze this problem. Based on the results, we identify the failure mechanisms and factors which affect degradation of intrinsic retention characteristics.
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