Abstract
A Digital-to-frequency converter (DFC) based on the concept of time-average frequency and a flying-adder frequency synthesizer is a novel circuit component that enables many system-level innovations. The clock output of the DFC has unique characteristics in both time and frequency domains. In this paper, a study on the energy distribution of the DFC output for a special case is presented. Mathematical analysis is performed, and closed-form expression is derived for this case.
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