Abstract

This paper presents the analysis of problem as to when the GaN HEMT (Gallium nitride high electron mobility transistor) is applied to power conversion system. Compared to state-of-the-art super junction Si (Silicon) MOSFET (Metal oxide semiconductor field effect transistor), the FOM (Figure of merit) is much better because of heterojunction structure and wide band gap characteristics. However, designing the power conversion system with GaN HEMT is difficult due to its sensitive threshold voltage. The quite small parasitic capacitance makes it harder to design due to steep dv/dt and di/dt and design factor different from MOSFET as well. In this paper, the printed circuit board layout consideration is analyzed to realize effects of parasitic inductance of power and gate driver loop. In addition, the cause of the ZVS (Zero Voltage Switching) failure is mathematically analyzed as a result of mismatched deadtime. A 600 W phase shifted full bridge dc-dc converter is designed to evaluate effects of parasitic inductance and ZVS failure issues.

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