ANALYSIS OF FAILURE MECHANISMS IN THE INTERCONNECT LINES OF MICROELECTRONIC CIRCUITS

Abstract

Interconnect lines are thin wires inside microelectronic circuits. The material in an interconnect line is subjected to severe mechanical and electrical loading, which causes voids to nucleate and propagate in the line: microelectronic circuits often fail because an interconnect is severed by a crack. Many of the mechanisms of failure are believed to be associated with diffusion of material through the line; driven by variations in elastic strain energy and stress in the solid, by the flow of electric current, and by variations in the free energy of the solid itself. With a view to modelling interconnect failures, we have developed a finite element method that may be used to compute the effects of diffusion and deformation in an electrically conducting, deformable solid. Our analysis accounts for large changes in the shape of the solid due to surface diffusion, grain boundary diffusion, and elastic or inelastic deformation within the grains. The methods of analysis is reviewed in this paper, and selected examples are used to illustrate the capabilities of the method. We compute the rate of growth of a void in an interconnect by coupled grain boundary diffusion and creep; we investigate void migration and evolution by electromigration‐induced surface diffusion; we study the influence of electromigration and stress on hillock formation in unpassivated interconnects, and compute the distribution of stress and plastic strain induced by electromigration in a passivated, polycrystalline interconnect line.