Abstract

Evolvable Hardware (EHW) is hardware that can dynamically change its behavior and architecture by interacting with its environment. EHW can make use of evolutionary algorithms (EAs) to optimally synthesize electrical circuits. In this paper, five different mutation methods are implemented in a conventional genetic algorithm technique to automatically realize a digital 8 bit full adder (FA). The main achievement of this work is the comparison between those techniques in terms of number of iterations required to converge on the required logical structure. Results demonstrate that the sequential mutation method (SMM) and circular gene method (CGM) reduce the convergence time, and a substantial reduction is observed when these methods are combined with the Adaptive Group Mutation (AGM) method for the full adder implementation.

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