Analysis of electrode thickness variation on performance parameters of polymer thin film transistors using device simulation

Abstract

This paper provides a detailed analysis of top and bottom gate polymer thin film transistor PTFT structures for different positions of the source and drain contacts through 2D device simulation. The performances of all the structures are compared in terms of electrical parameters keeping structural dimensions and material properties constant. Further analysis extends to bottom gate devices with an infinitesimal contact thickness to 25 nm. The results reveal higher drain current for top contact and changes minutely with the contact thickness, however up to three times increment is observed for bottom contact, but comparatively the current magnitude is still lower than the top contact device. Further higher on-off current ratio, transconductance and mobility is extracted for top contact and an average variation of 0.002 cm²/V.s in mobility is noticed for every 5 nm change in thickness, whereas, linear increment is observed while contacts are at bottom.