Abstract
A complete pulse-frequency modulation (PFM) pixel design analysis and noise measurement for CMOS image sensor applications are presented. This work investigates the design parameters such as dynamic range (DR), signal linearity, and comparator characteristics. The design strategies for wide DR imaging are addressed in detail, and signal linearity is analyzed by considering the analog circuit parameters. The temporal noise is also measured to understand the design tradeoffs of the PFM pixels. The analysis is executed by performing HSPICE simulation and practical pixel measurements. The technology used by the measured pixel is a 0.18-μm one-poly six-metal CMOS process. According to the results, a PFM pixel using the submicrometer CMOS process has a DR of 130-160 dB, and the cost of reaching a higher signal linearity or lower noise floor is the loss of frame rate. In addition, the bandwidth of the comparator can be extended to improve sensor linearity.
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