Analysis of Current–Voltage Measurements on Long-Wavelength HgCdTe Photodiodes Fabricated on Si Composite Substrates

Abstract

We have performed a detailed study of dark current versus voltage to understand existing limitations in dark current and address the nonuniformity of dark current in devices fabricated on HgCdTe grown on silicon substrates. One interesting observation is that trap-assisted tunneling, g-r currents, are not found close to zero bias in certain devices. Devices from the low end of the R0A distribution show heavy shunting paths close to zero bias. We believe that these shunting paths may be the limiting cause of tail distributions in fabricated focal plane array tail distributions. Possible causes for these shunting paths are surface charges associated with dislocation cores and impurity gettering at dislocation cores. The measured non-anti-reflection (AR)-coated quantum efficiency (QE) was 0.576 at 78 K and displays the classical response versus wavelength. The measured QE on isolated single devices is consistent with the 256 × 256 focal-plane array mean QE. Obtained average dark currents are on the order of mid 10−5 A cm–2, which is one order of magnitude higher than dark currents obtained from arrays on lattice-matched substrates. On average, arrays on lattice-mismatched substrates show performance characteristics inferior to those of arrays fabricated on lattice-matched substrates. This inferior performance is due to array pixel operability, as can be seen from the tail of the distribution and the average dark currents, which are one order of magnitude higher than those obtained on lattice-matched substrates.