Analysis of Carrier Transport in Trigate Si Nanowire MOSFETs

Abstract

Trigate Si nanowire (NW) MOSFETs have been fabricated and characterized at temperature between 77 and 300 K in the dark and under light pumping. The NW width <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">W</i> and height <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">H</i> , the gate length <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Lg</i> , and the gate oxide thickness <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ox</sub> , respectively, were 7-25, 16, 34-52, and 7 nm. The interesting aspects of Si NW MOSFETs with <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">W</i> / <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Lg</i> = 25 nm /52 nm, 24 nm/34 nm, 7 nm/47 nm, and 10 nm/37 nm measured at low drain voltage are that the drain current exhibited not only inverse temperature dependence in strong accumulation but also clear current plateaus/oscillations near the threshold regime at temperature up to 300 K. Notably, such current plateaus diminished or were invisible in the device of <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">W</i> / <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Lg</i> = 24 nm/42 nm. The observed current behaviors are inferred from the interplay of quantum interference and intersubband scattering effects. Additional current plateaus due to photogenerated excitons were also observed in the studied devices, evidencing photoexcitation effects on quantum transports through a Si NW.