Abstract
The article gives a review of existing methods of network-on-chip design based on the approach in which mapping of the characteristic tasks graph is performed on a given regular topology. The networks-on-chip synthesis problem is generally characterized. The analysis and comparison of standard topologies (mesh and torus) with circulant topologies are performed. Advantages and disadvantages of mesh and torus topologies usage, and the effect, achieved by their application to various implementations of networks on chip, are analyzed. Extension of the scope of solutions for standard regular network topologies mesh and torus on the circulant topologies with better characteristics is proposed. This will make it possible to take advantage of the deterministic approach, but with the use of more effective NoC topologies optimized for a particular task.
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