Analysis, Design and Control of an Integrated Three-Level Buck Converter under DCM Operation

Abstract

A three-level buck (TLB) converter has the characteristics of higher voltage conversion efficiency, lower inductor current ripples, output voltage ripples and voltage stresses on switches when compared with the buck converters in continuous conduction mode (CCM). With a TLB converter integrated on a chip, we cannot avoid its discontinuous conduction mode (DCM) operation due to a smaller inductance and load variation. In this paper, we’ll present and discuss the analysis, design and control of a TLB converter under DCM operation, implemented in a 65[Formula: see text]nm CMOS process. Transistor level simulation results show that when the TLB converter operates at 100[Formula: see text]MHz with a 5[Formula: see text]nH on-chip inductor, a 10[Formula: see text]nF output capacitor and a 10[Formula: see text]nF flying capacitor, it can achieve an output conversion range of 0.7–1.2[Formula: see text]V from a 2.4[Formula: see text]V input supply, with a peak efficiency of 81.5%@120[Formula: see text]mW. The output load transient response is 100[Formula: see text]mV with 101[Formula: see text]ns for undershoot, and 86[Formula: see text]mV with 110[Formula: see text]ns for overshoot when [Formula: see text]–100[Formula: see text]mA. The maximum output voltage ripple is less than 19[Formula: see text]mV.