Analysis and Simulation of Single Tail and Double Tail Circuits

Abstract

This High performance comparator circuits are imperative and indispensable modules for the implementation of integrated circuit data converter architectures to be utilized for different wireless portable electronic systems. The comparator works shown in this paper explores two different architectures by giving strong importance to specifications such as offset voltage (mV), power dissipation (µW), voltage gain (dB), kick back noise reduction, propagation delay (ps) and speed-power product (fJ). The modified double tail comparator uses regenerative feedback to convert the output to a full scale digital output signal. The circuit can accept both negative and positive voltages. This works presents the comprehensive analysis and simulation of two comparator circuits and is carried out in CMOS 0.13µm technology. An integrated circuit designer can completely balance the tradeoffs such as reduction of power consumption, circuit speed, and offset voltage minimization for the comparator circuit.