Analysis and reduction of leakage current of 2 kV monolithic isolator with wide trench spiral isolation structure

Abstract

In this work, the origin of the leakage current of a highly area-efficient silicon-on-insulator (SOI) monolithic isolator using a spiral trench isolation structure is clarified by experimental and simulation analyses and its reduction method is proposed. It was found that parasitic MOSFET inversion and accumulation channels formed at the SOI and buried oxide (BOX) interface are the origins of leakage current. To reduce the leakage current, adequate SOI spiral length and width and BOX layer thickness are proposed for various voltage usages and show the possibility of 4 kV voltage tolerance and 500 MΩ isolation resistivity.