Abstract
: This paper presents two-dimensional process and device(15V) simulation results and optimization of power device in a 0.35um Bipolar/CMOS/DMOS(BCD) process. Detailed device simulations and structure designs have been done. Test structures with specific considerations have been developed. With both simulation and experimental results, the optimized devices show excellent performance, which have been demonstrated with characterization results from devices on wafers from process qualification lots.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
