Abstract

This article presents a detailed analysis of the impact of the tank feedline on tuning range (TR) and phase noise (PN) in millimeter-wave <i>LC</i> voltage-controlled oscillators (VCOs). A robust extended TR design, with low PN and small die area, is later proposed, analyzed, and experimentally validated. A new interconnect approach for the coarse tuning capacitor bank is used to significantly reduce the <i>LC</i> tank routing capacitance and resistance, thus improving the TR and PN of the VCO. As a proof of concept, a 26.8-GHz VCO with a 5-bit digitally switched-capacitor bank [capacitor digital-to-analog converter (C-DAC)] is implemented using a folded feedline routing structure in a digital 45-nm CMOS silicon-on-insulator (SOI) technology. Compared to a conventional layout structure, the proposed interconnect technique yields a wider TR and lower losses while significantly improving the linearity of the C-DAC. The fabricated VCO yields a TR of 33&#x0025;, covering the extended 5G frequency band with a sufficient margin from 22.4 to 31.2 GHz, with a minimum overlap of 40&#x0025;. Moreover, it achieves a PN of &#x2212;105.5 and &#x2212;97.2 dBc/Hz at a 1-MHz offset at the low and high bands, respectively, while dissipating 6 mW from a 1.0-V supply, corresponding to an average FOM<sub>T</sub> of &#x2212;192.6 dBc/Hz.

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