Analysis and design of genetic algorithm-based cascade control strategy for improving the dynamic performance of interleaved DC–DC SEPIC PFC converter

Abstract

Switched-mode power supplies used for powering new generation devices like microprocessors, utility grids and electric vehicles need to operate with faster dynamic response. This paper proposes cascade control technique using genetic algorithm to obtain the optimal proportional integral outer voltage and inner current controller parameters of interleaved DC–DC single-ended primary inductance converter for power factor correction in SMPS with fast dynamic response. The state space model of the interleaved DC–DC SEPIC converter is derived using state space averaging technique. The system is of higher order, and hence, the reduced-order model of the interleaved DC–DC SEPIC converter is realized using Hankel matrix approach to reduce the computational complexity in controller design. The optimal controller parameters are then obtained for the reduced-order system using genetic algorithm for improving the dynamic performance of the system. The performance of the closed-loop system is analyzed in terms of input power factor, % total harmonic distortion of source current, % efficiency and % load voltage regulation for variations in the line, load and reference voltage using Matlab/Simulink software tool. A prototype of the converter controlled by TMS320C2000™ microcontroller for an output power of 200 W is tested and validated with the simulation results.