Abstract

Emerging applications in D-band (110–170GHz) demand amplifiers with high gain-bandwidth (GBW) products. In this frequency range, the cascode stage offers superior available gain, thanks to the high output impedance, but the design of the output matching network entails a GBW tradeoff. The issue is deeply investigated in this work. Simple, closed-form equations for gain and bandwidth as a function of the load reflection coefficient are derived, leading to the following design insights: 1) for maximum gain and bandwidth, the output matching network should be implemented with positive (magnetic) reactances; 2) with lossy reactances, an optimal load reflection coefficient exists to maximize the power gain, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\Gamma '_{L-{\mathrm{ opt}}}}$ </tex-math></inline-formula> ; and 3) by selecting <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\Gamma '_{L} &lt; \Gamma '_{L-{\mathrm{ opt}}}}$ </tex-math></inline-formula> , the bandwidth increases quickly with a marginal gain penalty, finally enhancing the GBW product. Leveraging the results of the analysis, single-stage and multistage stagger-tuned amplifiers are implemented in SiGe BiCMOS technology. Two- and three-stage amplifiers demonstrate more than 60GHz bandwidth with 20 and 28dB gain, respectively, corresponding to 700GHz and 1.7 THz GBW. Normalizing gain and bandwidth to the number of stages and technology <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$f_{\max }$ </tex-math></inline-formula> , the resulting figure of merit is remarkably higher than previously reported silicon amplifiers in the same band.

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