Abstract

AbstractIn this article, an LDMOS class‐E power amplifier is analyzed based on the equivalent transistor model considering drift region effect.In the analysis, nonzero switch‐on resistance, parasitic feedback capacitance, and finite drain DC feed inductance are taken into account, so as to present an optimized design technique. A class‐E power amplifier at 1 GHz is designed and simulated using the numerical results derived from the theoretical analysis. Freescale's MRF21010 is selected as the LDMOS device to further validate the design approach in experiment. Testing results show that drain efficiency of 70.4%, PAE of 66.2%, and output power of 38.28 dBm are observed with a 12 V drain supply voltage and a 26 dBm input power, which agrees with simulation data. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 1836–1842, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.25301

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