Abstract

The fast edge rates achievable by wide-bandgap semiconductors can produce significant common-mode (CM) leakage currents through the baseplates of encompassing power modules, which are known to produce elevated electromagnetic signatures for power electronic applications. This article provides a theoretical treatment of this CM behavior for a typical silicon carbide half-bridge multichip power module in the context of an example system consisting of a half-bridge inverter. A CM equivalent model is produced that quantitatively relates the distribution of the parasitic baseplate capacitance across the module terminals to the amplitude of the leakage current through the module baseplate for the converter under study. The model predicts that this leakage current can be canceled out by achieving a prescribed distribution of said baseplate capacitance. These predictions are validated by a set of empirical studies in which the model predictions are shown to be in excellent agreement with the measured behavior of this system. Through these demonstrations, the theoretical treatment provided in this article is shown to be a useful tool to identify simple and effective means for mitigation of CM behavior within power electronic systems. As such, this approach is expected to be of significant interest to system designers seeking to optimize the performance of applications with respect to CM behavior.

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