Analogue circuit synthesis from VHDL-AMS

Abstract

The paper presents the evolution of analogue synthesis techniques and present recent research results into automated analogue synthesis in the context of VHDL-AMS. The emergence of VHDL-AMS provides a basis for a new approach to analogue and mixed-signal circuit synthesis. Like digital VHDL, VHDL-AMS supports process-level parallelism and provides constructs to describe process communication and signal assignments. This gives rise to a development of architectural analogue synthesis techniques that would be analogous to the well-established methods in digital synthesis based on high-level VHDL or Verilog descriptions. Two sample synthesis systems based on VHDL-AMS, i.e. VASE and NEUSYS are presented.