Analog/RF performance comparison of underlap gate stack DG NMOSFETs in sub 65nm regime

Abstract

This paper consists of comparative study of U-DG-GS-NMOSFET for different channel lengths(Lch). Channel length below 100 nm leads to Short Channel Effects (SCEs). Gate Induced Drain Leakage (GIDL) and Drain Induced Barrrier Lowering are the major problem for any short channel device. Gate Stack arrangement is used to reduce GIDL and source-drain underlap regions are used to minimize the effects of DIBL. The length of the underlap (Lu) region is optimized for 32nm channel length. With the optimized underlap length, the device performance for different channel lengths such as 32nm, 45nm and 65nm have been studied. The device performance which have been studied are transfer characteristics, drain characteristics, transconductance (gm), transconductance generation factor (gm/Ids), output resistance(Ro), intrinsic gain(gmRo), total gate capacitance (Cgg), cut-off frequency (fT), maximum frequency of oscillation(fmax).