Analog LSI implementation of self-learning neural networks

Abstract

This paper describes a circuit architecture and analog memory devices suitable for analog neural LSIs with on-chip learning capability. First, the essential performances of analog and digital LSI implementations are compared semi-quantitatively and it is derived that the analog approach is more than several thousands times faster than the digital one for feedback networks. Next, a general analog LSI architecture implementing backpropagation networks, Hopfield networks and deterministic Boltzmann machines is proposed and tested using a prototype LSI with 18 neuron I/Os and 81 synapses. Finally, a practical high-speed, high-resolution and non-volatile analog weight memory circuit is proposed and tested. The weight can be updated with more than 14 bit resolution in 1 MHz and is back-uped to a non-volatile memory with 6 bit precision.