Analog Layout Synthesis

Abstract

Over the past decade, spurred by advances in mobile computing, there has been a fundamental shift in computing needs of consumer applications. There has been an industry-wide transition from highly CPU-centric to a peripheral-centric, connectivity and data-driven computing. This has paved way to the resurgence of Analog Mixed Signal Designs in both system-on-chip, and core computing architectures. However, the design automation capabilities used in production analog design flows have remained primarily manual with assisted-automation. Analog layout design and layout parasitic dependent circuit convergence remain a key bottleneck in industrial analog IP design.In this talk, we analyze the current state of analog design automation. We present a continuum of design scenarios, ranging from leading-edge design, to design migration across incremental process derivatives, and define the context of analog layout synthesis in each of these scenarios. We present an overview of recent advances in EDA research specific to analog layout automation [1] [2] and discuss their strengths and weaknesses when adapted to industrial analog IP design flows. Motivated by the confluence of emerging trends in EDA [3], and machine learning research [4], we discuss opportunities to bridge the last-mile gaps in automation, by combining constraint-driven, generator-based automation approaches, with statistical data-driven predictive methods.