Abstract
The front-end readout channel consists of a charge sensitive amplifier (CSA) and two different unipolar-shaping circuits to generate pulses suitable for time and energy measurement. The signal processing chain of the single channel is built of two different parallel processing paths: a fast path with a peaking time of 30 ns to obtain the time of arrival for each particle impinging the detector; and a slow path with a peaking time of 400 ns dedicated for low noise amplitude measurements, which is formed by a pole-zero cancellation circuit and a 4th order complex shaper based on a bridged-T architecture. The tunability of the system is accomplished by the discharge time constant of the CSA in order to accommodate various event rates. The readout system has been implemented in a 180 nm CMOS technology with the size of 525 μm x 290 μm. The building blocks use compact gain-boosting techniques based on quasi-floating gate (QFG) transistors achieving accurate energy measurement with good resolution. The high impedance nodes of QFG transistors require a detailed study of sensitivity to single-effect transients (SET). After carrying out this study, this paper proposes a method to select the value of the QFG capacitors, minimizing the area occupancy while maintaining robustness to radiation. The nonlinearity of the CSA-slow-shaper has been found to be less than 1% over a 10-70 fC input charge. The power dissipation of the readout channel is 4.1 mW with a supply voltage of 1.8 V.
Highlights
Front-end electronics (FEE) are a fundamental part in the signal processing systems of modern particle detectors
Signal processing from radiation detectors for nuclear or particle physics, or medical imaging applications, are particular fields where FEE are widely used, with a trend towards complete system on chip design solutions [1]-[4]. In some of these scenarios the performance of analog circuits under radiation conditions is nowadays a main concern. This hostile environment, in which the FEE systems often operate, requires designs that take into consideration the harmful effect of radiation on some electronic components, especially those based on semiconductors, as this increases the probability of failure
As the proposed FEE is intended for radiation detection, these techniques should be validated assuming that the readout channel works in harsh environments, such as, particle accelerators or nuclear applications, where high levels of ionizing radiation interact with analog components, producing large voltage transients, which must be taken into account to ensure a proper functionality of the system
Summary
Front-end electronics (FEE) are a fundamental part in the signal processing systems of modern particle detectors. In some of these scenarios the performance of analog circuits under radiation conditions is nowadays a main concern This hostile environment, in which the FEE systems often operate, requires designs that take into consideration the harmful effect of radiation on some electronic components, especially those based on semiconductors, as this increases the probability of failure. As the proposed FEE is intended for radiation detection, these techniques should be validated assuming that the readout channel works in harsh environments, such as, particle accelerators or nuclear applications, where high levels of ionizing radiation interact with analog components, producing large voltage transients, which must be taken into account to ensure a proper functionality of the system. In nuclear and particle physics, the signals obtained are usually pulse signals
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