An X-Band 6-bit MMIC Digital Controlled Attenuator with Low Insertion Phase Shift

Abstract

This paper proposes an 8–12 GHz 6-bit digital controlled attenuator (DCA) MMIC with low insertion phase shift in <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.25-\upmu\mathrm{m}$</tex> GaAs process. An improved switched π-type attenuation network with shunt compensating capacitors is introduced to decrease the insertion phase shift. A simplified switched T-type attenuation network is utilized to design 0.5-dB, 1-dB attenuation cells to reduce chip size. The extra transmission lines and interstage matching networks are designed to compensate phase shift and improve return loss, respectively. The DCA has a maximum attenuation range of 31.5 dB with 0.5-dB steps (64 states). The simulation results show that return loss of lower than -18 dB and insertion loss of lower than -4.9 dB are achieved. The root mean square (RMS) amplitude errors and the phase errors of all states are less than 0.26 dB and 2.5°, respectively. The total chip size including RF and DC pads is 2.06 × 1.06 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .