An Ultra-Low Quiescent Current Output Capacitor-Less Low-Dropout Regulator with Dynamic Bias Circuit

Abstract

An ultra-low quiescent current LDO regulator for micro-energy harvesting system is implemented in a standard 0.35 um CMOS process. By using an error amplifier with double differential input and a push-pull output stage architecture, the proposed LDO is able to operate at ultra low quiescent current. Adding dynamic bias circuit ensures that the system still has a good working condition over the entire load range. Detail analysis is given to explain its operating principle. Simulation results are presented for the proposed LDO. Load transient measurements show that the maximum overshoot and undershoot voltage are 63 and 79 mV respectively, while the line transient measurements show the output variation are within 50 mV in all circumstances. The quiescent current is only 900 n A at supply voltage of 2.3 V under the minimum load condition.