An ultralow-power CMOS bandgap voltage reference with N+ doped PMOS

Abstract

An ultra-low-power and low-area complementary metal oxide semiconductor (CMOS) bandgap voltage reference, without resistor and substrate bipolar, is presented and verified in the TSMC 0.18 μm CMOS process in this paper. By adopting PMOS transistor with N+ doped gate and a new temperature compensation technique, the proposed bandgap demonstrates a power consumption of around 50 nA for a supply voltage of 1.5 V and a temperature coefficient of 75 ppm without trimming. The chip can operate with a supply voltage from 1.2 V to 1.8 V and small area of the bandgap is around 0.001 mm2. The characteristic of the proposed voltage bandgap reference makes it suitable for ultralow-power low-area applications.