An Ultra-Broadband Quadruple-Stacked CMOS Power Amplifier

Abstract

This paper presents a 0.1–2 GHz ultra-broadband radio frequency (RF) power amplifier (PA) with 50Ω input and output matching using 0.18 μm CMOS technology. To obtain a good gain flatness and broadband matching with a small chip size, this PA employs a two-stage stacked-FET structure with combinations of matching resistor and feedback resistor. To overcome the low breakdown voltage, 4 FETs are connected in series to form a quadruple-stacked structure. The measurement results show a gain flatness of 18.1±0.6dB, the maximum input return loss (S11) of -10.5 dB, the maximum output return loss (S22) of -12.6 dB, and 20dBm saturated output power with the corresponding power added efficiency (PAE) of 12%. To our knowledge, this is the first CMOS PA ever reported which achieves this combination of instantaneous bandwidth, gain flatness, output power and broadband matching, within a chip size of 0.62 mm2.