An Ultra-Low Power Subthreshold CMOS RSSI for Wake-Up Receiver

Abstract

This paper reports an ultra-low power received signal strength indicator (RSSI) for low frequency (LF) wake-up receiver. Topology theory analysis and subthreshold operation are performed to lower power consumption. Each gain stage of the subthreshold limiting amplifier (LA) employs cascade diode-connected loads to obtain high output impedance while maintaining low power. An offset cancelation circuit with different tail currents, which also operates in the subthreshold region, is employed to reduce the DC offset voltage. Unbalanced source-coupled pairs of subthreshold devices adopted in the full-wave rectification are optimized. A 45[Formula: see text]dB input dynamic range and [Formula: see text][Formula: see text]dB indicating error are achieved at 125[Formula: see text]KHz frequency. The prototype occupies an active area of 0.39[Formula: see text][Formula: see text][Formula: see text]0.28[Formula: see text]mm using CSMC 0.153-[Formula: see text]m complementary metal-oxide-semiconductor (CMOS) technology. With a 1.8[Formula: see text]V supply voltage, the overall current consumption is only 6[Formula: see text][Formula: see text]A.