An ultra low power CMOS based temperature to digital converter in 0.045 µm technology

Abstract

This research propose a VLSI based temperature to digital converter (TDC) which is implemented with the aid of CMOS technology whose precise functionality is to sense the temperature-dependent source-gate voltage (VSG) of PMOS Transistor. It measures an inaccuracy of ±40 mK on 20 samples from one batch ranging between −60 °C to +60 °C temperature. This result is mainly due to the generation of pmos transistors drain currents which minimizes the spread in their gate to source voltages in addition to a PTAT digital circuit in support of the proper stretch in the pmos transistors emitter currents. The entire design has been implemented in 0.045 µm technology and draws a current of 0.3 µA which shows that the proposed TDC can be considered as ultra-low power device as the power consumed by it is 18.09E-12 W between the room temperatures of −60 °C to +60 °C. As per the accuracy of the proposed TDC the calibration cost can be reduced which would avoid the difficulty in the batch calibration. The supply voltage given to the device is 0.45 volts and a temperature inaccuracy of ±18 mk is achieved.