An Ultra-Low-Power 5 GHz LNA Design with Precise Calculation

Abstract

In this paper, an ultra-low-power low-noise amplifier (LNA) at 5GHz is proposed. The main focus is on precise computation of output impedance, input impedance, and gain of the LNA. The LNA is composed of a common-source LNA and a cascode LNA. In fact, the casode LNA can assist to have more stability by declining S12 considerably. Plus, it can be beneficial via increasing the gain of the second stage of the final LNA. In addition, in order to emphasize the significance of the meticulous calculations, the formulas calculated in this paper are compared with their counterparts in other papers. The combination of two different supply voltage is mentioned as an approach to bring down the power dissipation of the circuit. Simulation is performed by MATLAB, HSPICE, and Advanced Design System (ADS). TSMC 0.18 um CMOS process is used to evaluate the circuit. The LNA is analyzed with two different voltage supply 0.7 V and 0.9 V. The input matching (S11) is -14 dB and -16 dB for voltage supply 0.7 V and 0.9 V respectively. Plus, power dissipation, noise figure (NF), and gain (S21) are 532 μW, 944 μW, 1.25 dB, 1.05dB, 15dB, and 17dB for voltage supply 0.7 V and 0.9 V respectively.