Abstract

This paper presents circuit techniques for ultra-high input impedance analog front end (AFE). In order to boost input impedance, various on- and off-chip parasitic capacitances are cancelled using an active shield and negative capacitance technique. To maximize the cancellation, a self-calibration scheme with active shield replica is proposed for positive feedback-based negative capacitance, which settles at the boundary between stable and unstable states in calibration mode. A prototype IC fabricated in 0.18- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS achieves an input impedance of 50 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{G}\Omega$ </tex-math></inline-formula> at 50 Hz, equivalent to 60-fF capacitance, while consuming 289 nW from 0.8-V supply. The proposed AFE is applied to heart-rate monitoring using 1-cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> dry electrodes over clothes without any straps.

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