An SRAM Based on the MSET Device

Abstract

From its conceptual inception in 2015, the combined capabilities of the multiple-state electrostatically formed nanowire transistor (MSET) have given way to a unique set of logic structures—in the example of NAND and NOR gates—which utilize fewer transistors as compared to conventional technologies. In this paper, we expand the recently published framework of MSET logic functions and present a static random access memory (SRAM) memory structure that consists entirely of MSET devices. Using TCAD simulations, we demonstrate the MSET-SRAM functionality in several phases of operation, while analyzing its performance in terms of speed, stability, and power consumption.