Abstract
This paper demonstrates for the first time the use of a very large secure digital card flash memory to the design of a three-phase pulse width modulation (PWM) generator and describes the hardware and software used for implementation. The new digital architecture differs from the conventional counter-based implementation, and it follows a preprogrammed optimal PWM pattern that is read from memory with magnitude and phase as coordinates. This architecture allows the inclusion of multiple optimization criteria within the PWM pattern. This digital architecture becomes valuable since the switching instants can be set in any conceivable manner, away from the rigid constraint of a repetitive sequence of states on each PWM period. Experimental results validate that the proposed new architecture allows simple and low cost implementation of complicated PWM patterns with harmonic reductions that could not otherwise be achieved for low cost.
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