An Orthogonal Obfuscation Method on Extend Instruction Sets for Sequrity RISC-V Circuit

Abstract

In the RISC-V architecture, it is very important to extend instruction sets for achieving functions of product requirement. Usually, RISC-V research adopts simple look-up table decoding, which is difficult to protect the extended instruction set effectively. After researching on instruction set, this paper proposes a block RISC-V instruction set extension method based on orthogonal obfuscation. The method reads instruction set feature information from RISC-V extended instruction set and constructs orthogonal obfuscation matrix with input excitation. Orthogonal obfuscation matrix is used to determine the correctness of the input key. The original instruction decoding process is obfuscated by key’s determination, and the obfuscation design of the extended instruction set is realized. The advantage of the proposed method is flexible unlocking extended instruction set, and resistant hardware attacks such as member information leakage and brute force attack. Finally, the orthogonal obfuscation RISC-V is implemented, and the experimental results show that the proposed method is effective.